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| #define | IS25LP064A_H |
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| #define | IS25LP064A_FLASH_SIZE 0x800000 |
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| #define | IS25LP064A_BLOCK_SIZE 0x10000 |
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| #define | IS25LP064A_SECTOR_SIZE 0x1000 |
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| #define | IS25LP064A_PAGE_SIZE 0x100 |
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| #define | IS25LP064A_DUMMY_CYCLES_READ_QUAD 8 |
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| #define | IS25LP064A_DUMMY_CYCLES_READ 8 |
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| #define | IS25LP064A_DUMMY_CYCLES_READ_DTR 6 |
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| #define | IS25LP064A_DUMMY_CYCLES_READ_QUAD_DTR 6 |
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| #define | IS25LP064A_DIE_ERASE_MAX_TIME 460000 |
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| #define | IS25LP064A_BLOCK_ERASE_MAX_TIME 1000 |
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| #define | IS25LP064A_SECTOR_ERASE_MAX_TIME 400 |
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| #define | ENTER_DEEP_POWER_DOWN 0XB9 |
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| #define | EXIT_DEEP_POWER_DOWN 0XB9 |
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| #define | RESET_ENABLE_CMD 0x66 |
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| #define | RESET_MEMORY_CMD 0x99 |
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| #define | READ_ID_CMD 0xAB |
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| #define | READ_ID_CMD2 0x9F |
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| #define | MULTIPLE_IO_READ_ID_CMD 0xAF |
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| #define | READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5A |
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| #define | READ_MANUFACT_AND_ID 0x90 |
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| #define | READ_UNIQUE_ID 0x4B |
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| #define | NO_OP 0x00 |
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| #define | SECTOR_UNLOCK 0x26 |
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| #define | SECTOR_LOCK 0x24 |
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| #define | INFO_ROW_ERASE_CMD 0x64 |
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| #define | INFO_ROW_PROGRAM_CMD 0x62 |
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| #define | INFO_ROW_READ_CMD 0x68 |
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| #define | READ_CMD 0x03 |
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| #define | FAST_READ_CMD 0x0B |
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| #define | FAST_READ_DTR_CMD 0x0D |
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| #define | DUAL_OUT_FAST_READ_CMD 0x3B |
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| #define | DUAL_INOUT_FAST_READ_CMD 0xBB |
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| #define | DUAL_INOUT_FAST_READ_DTR_CMD 0xBD |
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| #define | QUAD_OUT_FAST_READ_CMD 0x6B |
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| #define | QUAD_INOUT_FAST_READ_CMD 0xEB |
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| #define | QUAD_INOUT_FAST_READ_DTR_CMD 0xED |
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| #define | WRITE_ENABLE_CMD 0x06 |
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| #define | WRITE_DISABLE_CMD 0x04 |
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| #define | READ_STATUS_REG_CMD 0x05 |
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| #define | WRITE_STATUS_REG_CMD 0x01 |
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| #define | READ_FUNCTION_REGISTER 0X48 |
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| #define | WRITE_FUNCTION_REGISTER 0x42 |
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| #define | WRITE_READ_PARAM_REG_CMD 0xC0 |
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| #define | PAGE_PROG_CMD 0x02 |
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| #define | QUAD_IN_PAGE_PROG_CMD 0x32 |
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| #define | EXT_QUAD_IN_PAGE_PROG_CMD 0x38 |
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| #define | SECTOR_ERASE_CMD 0xd7 |
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| #define | SECTOR_ERASE_QPI_CMD 0x20 |
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| #define | BLOCK_ERASE_CMD 0xD8 |
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| #define | BLOCK_ERASE_32K_CMD 0x52 |
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| #define | CHIP_ERASE_CMD 0xC7 |
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| #define | EXT_CHIP_ERASE_CMD 0x60 |
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| #define | PROG_ERASE_RESUME_CMD 0x7A |
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| #define | EXT_PROG_ERASE_RESUME_CMD 0x30 |
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| #define | PROG_ERASE_SUSPEND_CMD 0x75 |
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| #define | EXT_PROG_ERASE_SUSPEND_CMD 0xB0 |
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| #define | ENTER_QUAD_CMD 0x35 |
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| #define | EXIT_QUAD_CMD 0xF5 |
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| #define | IS25LP064A_SR_WIP ((uint8_t)0x01) |
| | IS25LP08D Registers
|
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| #define | IS25LP064A_SR_WREN ((uint8_t)0x02) |
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| #define | IS25LP064A_SR_SRWREN ((uint8_t)0x80) |
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| #define | IS25LP064A_SR_QE ((uint8_t)0x40) |
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| #define | IS25LP064A_NVCR_NBADDR ((uint16_t)0x0001) |
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| #define | IS25LP064A_NVCR_SEGMENT ((uint16_t)0x0002) |
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| #define | IS25LP064A_NVCR_DUAL ((uint16_t)0x0004) |
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| #define | IS25LP064A_NVCR_QUAB ((uint16_t)0x0008) |
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| #define | IS25LP064A_NVCR_RH ((uint16_t)0x0010) |
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| #define | IS25LP064A_NVCR_DTRP ((uint16_t)0x0020) |
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| #define | IS25LP064A_NVCR_ODS ((uint16_t)0x01C0) |
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| #define | IS25LP064A_NVCR_XIP ((uint16_t)0x0E00) |
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| #define | IS25LP064A_NVCR_NB_DUMMY ((uint16_t)0xF000) |
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| #define | IS25LP064A_VCR_WRAP ((uint8_t)0x03) |
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| #define | IS25LP064A_VCR_XIP ((uint8_t)0x08) |
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| #define | IS25LP064A_VCR_NB_DUMMY ((uint8_t)0xF0) |
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| #define | IS25LP064A_EAR_HIGHEST_SE ((uint8_t)0x03) |
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| #define | IS25LP064A_EAR_THIRD_SEG ((uint8_t)0x02) |
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| #define | IS25LP064A_EAR_SECOND_SEG ((uint8_t)0x01) |
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| #define | IS25LP064A_EAR_LOWEST_SEG ((uint8_t)0x00) |
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| #define | IS25LP064A_EVCR_ODS ((uint8_t)0x07) |
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| #define | IS25LP064A_EVCR_RH ((uint8_t)0x10) |
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| #define | IS25LP064A_EVCR_DTRP ((uint8_t)0x20) |
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| #define | IS25LP064A_EVCR_DUAL ((uint8_t)0x40) |
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| #define | IS25LP064A_EVCR_QUAD ((uint8_t)0x80) |
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| #define | IS25LP064A_FSR_NBADDR ((uint8_t)0x01) |
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| #define | IS25LP064A_FSR_PRERR ((uint8_t)0x02) |
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| #define | IS25LP064A_FSR_PGSUS ((uint8_t)0x04) |
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| #define | IS25LP064A_FSR_PGERR ((uint8_t)0x10) |
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| #define | IS25LP064A_FSR_ERERR ((uint8_t)0x20) |
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| #define | IS25LP064A_FSR_ERSUS ((uint8_t)0x40) |
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| #define | IS25LP064A_FSR_READY ((uint8_t)0x80) |
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